The present invention relates generally to test circuits and more specifically to a system and method for performing a digital built in self test (BIST) of Analog to Digital (ADC) and Digital to Analog (DAC) circuits.
The function of test of a semiconductor device is twofold. First, is design debug, to understand the failing section of the device, identify areas for changes and verify correct modes of operation. The second major area is to simply separate good devices from bad devices in a production test environment.
The basis for all testing of complex integrated circuits is a comparison of known good patterns to the response of a DUT (device under test). The simulation of the devices is done with input stimuli and those same input stimuli (vectors) are presented on the DUT. Comparisons are made cycle by cycle with an option to ignore certain pins, times or patterns. If the device response and the expected response are not in agreement, the device is usually considered defective.
Self-testing (built-in self-test or BIST) is essentially the implementation of logic built into the circuitry to perform testing without the use of an external tester for pattern generation and comparison purposes. “Logic”, as used herein, includes but is not limited to hardware, firmware, software and/or combinations of each to perform a function(s) or an action(s), and/or to cause a function or action from another component. For example, based on a desired application or need, logic may include a software controlled microprocessor, discrete logic such as an application specific integrated circuit (ASIC), a programmable/programmed logic device, memory device containing instructions, or the like, or combinational logic embodied in hardware. Logic may also be fully embodied as software. A tester is still needed to categorize failures and to separate good from bad units. In this case, the test system supplies clocks to the device and determines pass/fail from the outputs of the device. The sequential elements are run with a known data pattern and a signature is generated. The signature can be a simple go or no-go signal on one pin of the part, or the signal may be a polynomial generated during testing, wherein the polynomial has some significance as to the actual state of the DUT during testing.
In a typical semiconductor manufacturing environment, there are usually a plethora of digital testers available, but few analog testers. This is because analog testers are usually limited in number, limited in capability and can be more expensive than digital testers.
The typical semiconductor chip is comprised of analog and digital components. This can require double testing. Furthermore, the analog test function can be slow. Thus, there is a need for improved testing techniques.